VxWorks BSP Reference : wrPpmc74xx
wrPpmc74xx - Wind River PPMC74xx
This reference entry provides board-specific information necessary to run VxWorks for the wrPpmc74xx BSP. Please read the section "Getting the board running vxWorks" in order to configure the board to run vxWorks.
Getting the board running vxWorks This section will guide you step by step how to get vxWorks running on this board.
1. Setting the board Jumpers & Switches:
In order to get the board running with the default configuration. the
following jumper's and switch's need to be set as follows:.CS
On the carrier board:
--------------------JP3 1-2
JP4 2-3On the PMC board:
----------------For Default XPC7400/MPC7400
---------------------------
SW1-1 Off SW3-1 Off SW2-1 Off
SW1-2 On SW3-2 Off SW2-2 On
SW1-3 Off SW3-3 On SW2-3 Off
SW1-4 On SW3-4 Off SW2-4 Off
SW3-5 On SW2-5 Off
SW3-6 Off SW2-6 Off
SW2-7 On
SW2-8 OffJP37 Open
On Power Module:
---------------For Default XPC7400 (2.15V) For Default MPC700 (1.8V)
--------------------------- ------------------------
SW1-1 Off (1) SW1-1 On (0)
SW1-2 Off (1) SW1-2 On (0)
SW1-3 Off (1) SW1-3 Off (1)
SW1-4 Off (1) SW1-4 On (0)
SW1-5 On (0) SW1-5 Off (1)
SW1-6 On (0) SW1-6 On (0)
.CE2. Creating a bootrom_uncmp.hex:
2.1 Launch Tornado II, go to the "Build" menu and choose the option
"Build Boot ROM...".
2.2 the "Build Boot ROM" window will popup, in the "Select a BSP:" column
choose the "wrPpmc74xx", and in the "Select an Image to build:" column
choose "bootrom_uncmp.hex" and press the "OK" button.
2.3 After the build process will finish successfully (You will see "Done" in
the "Build window" without error), you will have the bootrom_uncmp.hex in
your BSP directory "$(WIND_BASE)/target/config/wrPpmc74xx".3. Programming bootrom_uncmp to PPMC74xx FLASH:
If you are using visionCLICK please follow the instruction in section 3.1
if you are using SingleStep please follow the instruction in section 3.23.1 Using visionCLICK:
3.1.1 Install the visionPROBE II or visionICE II and power it on.
Connect the JTAG interface cable from the visionPROBE II or
visionICE II into the PPMC74xx board JTAG (JP6 The JTAG Port)
connector.Once all the connections have been made, power up the PPMC74xx
board and start the visionCLICK executable on the host.3.1.2 Configure the visionCLICK project:
The "Welcome To visionCLICK" window will appear .In this window
press on the "Configure" button, This will invoke "PROJECTS/LOAD"
window. In this window press on the + left to the
"PowerPC_C_Demo.prj".This will show you the project configuration.
Point with the mouse cursor on the "Microprocessors" option and
press the right button and choose the type of CPU you have on your
board. For example: "PowerPC->MPC7xx->MPC7400" for the MPC7400 or
"PowerPC->MPC7xx->MPC7410" for the MPC7410. Verify that the
"Target Control" option point to visionPROBE for visionPROBE II or
visionICE for visionICE II, Also switch to the "Communications"
TAB and verify that the "Normal Port/Rate" & "Download Port/Rate"
suite your connection. for example: "LPT1" for visionPROBE II.
Now press the "Save" button at the bottom of the window and after
it on the "Activate" button.3.1.3 Program visionPROBE II / visionICE II with the proper register
setting for the PPMC74xx board:Go to the "Tools" menu and select the
"Log Output/Playback Scripts" option. The "Record / Playback"
dialog box will popup. In this dialog box go to the
"Playback Commands From File" group and press on the "Browse"
button. Navigate your self to the location of the following
register file: "ppmc7400_107.reg" for the MPC7400 or
"ppmc7410_107.reg" for the MPC7410. The file located in the
visionCLICK installation. After choosing the register file press
on the "Open" button to confirm the selected reg file. You will
return back to the "Record / Playback" dialog box. Now press on
the "Start" button located in the same group. In the "Terminal"
window you can see that the visionCLICK is running the script.
When visionCLICK will finish the playback you will get back the
">BKM>" or the ">ERR>".3.1.4 Get into Background Mode:
Execute the "IN" command to reset the board and initialize it with
the register setting..CS
IN
.CSThis command is the reset command to initialize the board.
3.1.5 Converting the bootrom_uncmp.hex to bootrom_uncmp.bin:
3.1.5.1 In visionCLICK, choose "Convert Object Modules" from the
"Tools" menu. The "CONVERT BINARY AND SYMBOL OBJs" dialog
box will pop up.Select "All Files" in the "Files of Type"
box. Go to the "Select Input Object Module To Convert"
group and navigate to the file "bootrom_uncmp.hex"
located in:
"$(WIND_BASE)/target/config/wrPpmc74xx/bootrom_uncmp.hex"3.1.5.2 In the group "Binary Downloadable Objects Modules" check
the "Create Flat BIN File For Flash Programming".
"In Range Of 0x" editbox, enter 0 for the start address,
and in the "To 0x" editbox, enter "FFFFFFFF".3.1.5.3 Make sure that all the other check box are unchecked.
Press the "Convert" button. Close the terminal window
when the conversion completes.3.1.6 Programming the PPMC74xx Flash:
In visionCLICK, select "Program Flash Devices" from the Tools
pull-down menu. This will invoke the "TF FLASH PROGRAMMING"
window. If you are not using visionCLICK, you can also invoke
this window using the "visionICE Utilities Panel" and follow the
steps below:3.1.6.1 Click the "Select" in the "Flash Card or PC Host File
Name and Path" group. The "CHOOSE A FILE FROM HOST PC"
dialog box will popup. In the edit box enter the full path
to the location of the "bootrom_uncmp.bin", or use the
"<--Browse" button to browse to the file location. Go to
the "+/- Bias" group and enter the number "FFF00100" in
the edit box. Now click the "OK" button, this will bring
you back to the "TF FLASH PROGRAMMING" dialog box.3.1.6.2 In the "Programming Algorithm" group in, the edit box
press on the "Select" button, and select one of the
following Flash devices:
For the 4MB Flash: "AMD 29F800T (512 x 16) 4 Devices"3.1.6.3 Set the proper address of the Flash to "FFF00000", check
the "Erase All" radio button,and set the
"Available RAM Workspace" setting to "00000000", set the
"Bytes Of Target RAM Required" to "60000".3.1.6.4 Press the "Erase and Program" button.
3.1.6.5 Now the Flash memory is programmed with the new boot
program.3.2 Using SingleStep for vision:
3.2.1 Install the visionPROBE II or visionICE II and power it on.
Connect the JTAG interface cable from the visionPROBE II or
visionICE II into the PPMC74xx board JTAG (JP6 The JTAG Port)
connector.Once all the connections have been made, power up the PPMC74xx
board and start the SingleStep for vision executable on the host.3.2.2 Configure the SingleStep project:
3.2.2.1 Go to the "File" menu and choose the
"Start Debug Session..." .3.2.2.2 The "Debug" dialog box will popup, In the "Connection" tab
choose the visionPROBE option & the correct LPT port if
you are using visionPROBE, or visionICE & enter the
emulator IP address if you are using visionICE.3.2.2.3 In the "Processor" tab choose the "MPC7400" for the
MPC7400 or "MPC7410" for the MPC7410.3.2.2.4 In the "Register" tab choose the option
"Use vision-style register window with REG file" and then
browse to the location of the file "ppmc7400_107.reg" for
the MPC7400 or "ppmc7410_107.reg" for MPC7410, and
choose it. The "ppmc7400_107.reg" or "ppmc7410_107.reg"
file should be in the SingleStep directory.3.2.2.5 In the "File" tab choose the "Debug without a file"
option.3.2.3 Get into Background Mode:
3.2.3.1 Now in the "File" tab press OK.
3.2.3.2 Now should get the "Debug Status" dialogbox and in the
"Debug Session" field you should have in green
"Started Successfully", press the "Close" button.3.2.3.3 Now go to the "Command" button in the toolbar and press on
it. The "Command" Window will popup, the prompt in the
window will be "SingleStep". Bring the mouse cursor above
the "Command" window and press the right button. A menu
will popup, choose the "VisionShell(vsh)" option. Now the
prompt in the window will be ">BKM>". If the prompt is
">ERR>" execute the "IN" command to reset the board and
initialize it with the register setting..CS
IN
.CS
This command is the reset command to initialize the board.
After you got the ">BKM>" prompt again continue with the
instruction in the next section.3.2.4 Converting the bootrom_uncmp.hex to bootrom_uncmp.bin:
3.2.4.1 Go to the menu and choose "Tools" and
"Vision Flash Utility..." .3.2.4.2 The "Flash Programming Window" will popup. Go to the
"Files" tab, press the "Convert" button.3.2.4.3 The "File Convertion" window will popup. In the
"Enter new start address" edit box type "0x0" and in the
"Enter new end address" edit box type "0xFFFFFFFF".3.2.4.4 Now press the "Convert" button. After the convert operation
finished, you will see it in the "Convert Result" section
press the "Close" button.3.2.5 Programming the PPMC74xx Flash:
3.2.5.2 In the "Flash Programming Window" window. Go to the
"Configuration" tab, & choose the following Flash device:For the 4MB Flash: "AMD 29F800T (512 x 16) 4 Devices"
In "Flash Bank" group for the "Start:" enter "FFF00000".
In the "RAM Workspace" group for the "Workspace Start at:"
enter "00000000" and for the "Workspace Size:" enter
"60000".3.2.5.3 Now switch to the "Files" tab and press the "Add" button.
The open dialogbox will popup, browse to
"$(WIND_BASE)\target\config\wrPpmc74xx "bootrom_uncmp.bin" file. Now after getting back to the
"Files" tab you will see the full path to the selected
file in the "Binary Files" group. Move the mouse curser
above the line that showing the full path in the
"Binary Files" group and press the right button to mark
this line. Now press the "Toggle Enable" button to select
this binary file. Make sure that the line is still marked,
and press the "Edit" button on the right. The "File Edit"
dialog box will popup. In the "Enter new start address"
edit box enter "0xFFF00100" and press the "OK" button.3.2.5.4 Now go to the "Program" tab and press the "Erase/Program"
button. After the process finished continue to step 5.3.2.5.5 Now the Flash memory is programmed with the new boot program.
4. Running the VxWorks Boot ROM program:
4.1 Disconect visionPROBE II or the visonICE II if it still connected to the
board, because it still connected to the board in some case it can stop
the processor at the first instruction.4.2 Connecting the Ethernet channel and the serial channel:
4.2.1 First, connect the supplied serial cable with the board. On
one said connect the RJ11 connector to the RS232 port on the front
of the 7400/7410 PMC module, and on the other said use the
RJ11 to 9/25 Pin addapter to connect it to your host. The UART
devices is set as follow: 8 data bits, 1 stop bit, hardware
handshaking, and parity disabled. The serial console (9600 bps).4.2.2 Second, plug the Intel PRO100B/S PCI NIC in the PCI slot on the
carrier board and connect a standard Ethernet cable to the NIC.4.3 Launch a terminal program on the host said, and configures it according
to the following details: 8 data bits, 1 stop bit, hardware handshaking,
and parity disabled. The serial console (9600 bps).4.4 Now to execute this new boot program turn the board off,and on. and you
should get the vxWorks boot count down on the terminal window. Press any
key to stop the count down. Now follow the instruction in the
instructions in the "Getting Started" chapter of the
"VxWorks Programmer's Guide." for more detail how to configure vxWorks.
The following section will explain how to launch VxWorks using visionWARE as a boot loader. Please follow the steps below:Note(s): - Before using vsionWARE, verify that visionWARE is programmed into the FLASH. If visionWARE is not in the FLASH, please read the "Programming bootrom_uncmp to PPMC74xx FLASH" section on how to program the PPMC74xx Flash, but ignore step 3.1.5 or 3.2.4, "Converting the bootrom_uncmp.hex to bootrom_uncmp.bin", and instead of programming the bootrom_uncmp.bin, program the vWARE.bin file.
1. Connect the PPMC74xx serial channel (RS232) to a host
running terminal program at 9600 baud rate
(For example HyperTerminal) using the supplied serial cable.2. Connect the PPMC74xx 100/10Base-T (On the PCI Ethernet card) port to a
network hub.3. Open TFTP server and point to the location of the vxWorks.bdx file.
If you want to use the TFTP server that is supplied with visionWARE,
go to the visionWARE directory on your host, inside the visionWARE root
directory you will find tftp directory that contain application called
"tftpd32.exe" . Run this application and the TFTPD32 window will popup.
In the TFTPD32 window press on the Settings button. This will invoke
the Tftpd32: Settings. Go to the Base Directory group and inside the
edit box type the full path to your vxWorks image, or use the Browse
button to navigate to there.4. Power up your PPMC74xx and press any key within 3 seconds from the
serial terminal to abort the boot script. This will display a ">BKM>"
prompt.5. Type the shell command and press enter. Now you should get the
following line: "File System Sectors (256K each) = 8 >" Press enter.6. Next line will be: "Boot Delay (seconds) = 1 >" . Here you need to
specify the desired delay value and press enter.7. Next line will be: "Boot Script = >" . Here you need to give the boot
script command. Please type the following if you are using vWARE 1.10:"load \host\vxWorks.bdx!osboot RAM!go 100000" . Where host is the
host name, and press enter.Or if you are using vWARE 2.0 please type the following:
"load \host\vxWorks.bdx!launch 100000"
Note(s):
** It is very important to keep the same space between the "load"
command and the host name "\host".** It is very important to keep the same space between the "osboot"
command and the "RAM".** The host name should be the same as specified in the
"Remote System 1 Name" line.8. Next line will be "MAC Address = 00-A0-11-22-23-E8 >" . If you want to
change the target MAC address, type it now and press enter, else press
just enter.9. Next line will be "IP Address = 0.0.0.0 >". Type your target IP address.
For example: 192.168.199.0 and press enter.10. Next line will be "Subnet Mask = 0.0.0.0 >". If you want to use subnet
mask, type it now and press enter, else just press enter.11. Next line will be "Default Gateway = 0.0.0.0 >". If you want to use
default gateway, type it now and press enter, else just press enter.12. Next line will be "Remote System 1 Name = >". Here you need to type the
same host name you specified in the "Boot Script" line.13. Next line will be "Remote System 1 IP = >". Here you need to type your
host IP address. For example: 192.168.199.1 and press enter.14. Next line will be "Remote System 2 Name = >". Just press enter.
15. Next line will be "Remote System 3 Name = >". Just press enter.
16. Next line will be "Remote System 4 Name = >". Just press enter.
17. Next line will be "Command Channel = 0: Serial >". Just press enter.
18. Now you will get the following message:
Saving changes will generate a reboot.
Save Changes (y/n)?Press y to save the changes.
19. Now the changes are saved and the board will restart visionWARE and boot
vxWorks, after a few seconds you will get the following messages:Wind River visionWARE v2.00 HSI PPMC 7xx Wind River HSI +1(781) 828 5588 Build #14, 09/11/01 08:43:14 MAC : 00-11-22-33-44-55 IP : 192.168.199.0 Type "shell" to set IP and/or MAC addresses Type "help" to see available commands Press a key in the next <6> seconds to preempt boot script Booting from script... load \\host\vxWorks.bdx!launch 100000 >RUN>Attached TCP/IP interface to fei unit 0 Attaching interface lo0...done VxWorks Copyright 1984-2001 Wind River Systems, Inc. CPU: Motorola PowerPC - Wind River PPMC7400 Board VxWorks: VxWorks5.5 BSP version: 1.2/2 Creation date: Oct 23 2001 WDB: ReadyFor more information regarding visionWARE boot services and the visionWARE development kit, please refer to the visionWARE manuals, located on the CD that was shipped with your board.
The supported boot device(s) is(are):fei - 100\10BaseT Ethernet
This section describes the support and unsupported features of the wrPpmc74xx
The supported features of the PPMC74xx board are:
7400/7410 processors with the AltiVec extension.
Board Initialization.
MMU support.
Cache support.
L2 Cache support.
Decrementer timer is used to implement a System Clock.
Timestamp clock.
NS 16550 UART (Consol channel).
FEI 10\100BaseT Intel 82557/9/0 PCI Ethernet device supporting 10\100Base-T protocol (5V & 3.3V PCI).
MPC107 Programmable Interrupt Controller.
MPC107 PCI bridge.
MPC107 Memory Controller.
SDRAM upgrade (64 to 256 MB Memory SODIMM).
FLASH 4MB On board.
Saving boot parameters on the flash when using vxWorks bootrom.
The items not supported on the PPMC74xx are:
Other MPC107 peripherals.
Aux Clock.
This section documents the details of the device drivers and board hardware elements for the PPMC74xx.
The chip drivers included are:
The BSP configures NS 16550 UART to implement a console device and the FEI82557 as an Ethernet.
sysNvRam.c Generic non-volatile RAM library ppcDecTimer.c system clock and timestamp driver using PPC decrementer amd29LV800TMem.c Flash access routines sysMpc107Epic.c Motorola MPC107 PIC interrupt controller driver sysMpc107Pci.c Motorola MPC107 PCI bus bridge chip driver pciConfigLib.c PCI Configuration Space Access Library pciConfigShow.c PCI Configuration Space Display Library pciAutoConfigLib.c PCI Bus Auto-configuration Library sysSerial.c prepares serial driver ns16550sio sysNet.c prepares PCI Ethernet driver "fei" sysACache.s PowerPC 750/755/7400/7410 L2 cache library ns16550Sio.c NS 16550 UART driver (serial ports 1) fei82557End.o Intel 82550, 82557, 82558, 82559 END driver
L1 cache locking is available for MPC750, MPC755, MPC7400 and MPC7410. The cache lock routine can be used to lock the entire data or instruction cache with a specified memory region.
L2 Cache is available for MPC750, MPC755, MPC7400 and MPC7410. Callback function pointers for L2 cache Global Invalidation, L2 Cache Enable, L2 Cache Flush and L2 Cache Disable are intialized in sysHwInit( ).
L2 cache locking is supported on MPC750, MPC755, MPC7400 and MPC7410. On these CPUs L2 is implemented as an unified cache. The L2 cache lock library can be used to lock data or instructions in the L2 cache.
MPC7400 and MPC 7410 support an altiVec sub-system that implements vector processing. Support for altiVec is now available, but an altiVec aware compiler must be used to create applications that use altiVec instructions. The altiVec support can be enabled by defining INCLUDE_ALTIVEC in config.h
Memory Map from CPU point of view
Chip Select Start Size Access to
---------------------------------------------------------------------
SDRAMCS0 (R/W) 0x0 64MB (min) SDRAM SODIMM
RCS0 (R/W) 0xFFC00000 4MB On Board FLASH
RCS3 (W) 0x78000000 --- User LED's (Register)
RCS2 (R/W) 0x7C000000 --- UART (Register)
RCS1 (R/W) 0xFF000000 --- MAIL BOX (Register)
(R/W) 0xFCE00000 --- EUMB
(R/W) 0x80000000 128MB PCI prefetchable memory
(R/W) 0x88000000 128MB PCI non-prefetchable memory
(R/W) 0xFE000000 16MB PCI IO
N/A
when using vPROBE/vICE to download the vxWorks image directly to RAM you need to remember that the CS & main CPU initialization are done by the emulator and not by the bootrom (romInit.s), because the reset symbol is "sysInit" and not the reset vector (0xFFF00100). Because this the code will execute only the module "sysALib.s", and it will not execute the module "romInit.s". If you will not use the correct register file the vxWorks image will not run correctly.
Initial boards and bsp are supplied with a 64Meg SDRAM SODIMM, which can be expanded to 256Meg by the user.
Note:
** When expanding the RAM to 256Meg, changes need to be done in the BSP
in order to change the chip select to support 256Meg.The BSP divides the 64Meg SDRAM into two 32Meg sections. The reason for this has to do with the EABI compilation option of a 24 bit address. The default compilation options generates a bl for branch instructions. This increases performance, but places a 32Meg address limit on the code.
There are two work arounds to this limitation.
1.) recompile all the source with the -mlongcall compilation flag
2.) add remaining 32Meg to the memory pool vi the memAddToPool( ) function.Option #1 would require all the libraries, driver, and the BSP to be recompiled with the -mlongcall compiler option. This results in a number of code changes; the most obvious code change is branches are implemented via brlr instruction verses the bl instruction.
Option #2, the perferrable options, requires the USER_RESERVED_MEM and the memAddToPool( ) constructs be used to specify the remaining 32Meg to be added to the memory pool. Consult WindTech Note WTN41 for details on specifying user memory.
All boards come with a PCI Ethernet card which is 10baseT and 100baseT compatible. The Ethernet card uses an RJ45 (twisted pair) jack and can be used with either 10baseT or 100baseTX. The Ethernet driver automatically senses and configures the port as 10baseT or 100baseT.
This BSP emulate NvRam via a the On Board FLASH device. There are a few user parameters associated with this device. The parameters are located in the wrPpmc74xx.h file.
The Media Access Control (Ethernet) address for each port is obtained from a serial ROM contained in the Intel 82557/9 chip. The Ethernet address should be written on the card itself, 12 digit number in Hex format. If it's not written on the card, you can use the arp -a command from the host command line in order to get the card Ethernet address.
bootrom_uncmp.bin is provided with this BSP. The bootrom is configured to a ROM base address of 0x0. When programing the bootrom to the FLASH an offset of 0xFFF00100 need to be given, also it's configured to use the 4 MByte on board Flash ROM and the 100/10BaseT Intel 82557/9 PCI Ethernet card as default boot device and the RS232 as console device. The bootrom takes approximately 10 seconds to boot, using the vWARE it take 1 second.
The BSP configures to use the 4MByte On Board Flash. This is the only Flash on the board.
The NS 16550 UART is configured as UART devices with 8 data bits, 1 stop bit, hardware handshaking, and parity disabled.
This VxWorks PPMC74xx board uses a simple 3 wire connection and standard phone jacks where pin 1 = RIN, pin 2 = TOUT, pin 3 = NC, and pin 4 = GND.
There is no SCSI interface on this board.
N/A
Two 32-bit address, 32-bit data; complies with PCI Local Bus Specification, Revision 2.1 The MPC107 on the PMC module is the PCI bridge.
The following images are delivered with the wrPpmc74xx BSP:
bootrom_uncmp bootrom_uncmp.hex bootrom bootrom.hex vxWorks vxWorks.st
Only bootrom_uncmp, bootrom & vxWorks have been tested.
This section describes miscellaneous information that the user needs to know about the BSP.
When using visionPROBE II or visionICE II to run vxWorks image or bootrom you need to set the VECTOR table location to low. To do this type the following command in visionCLICK Terminal window or SingleStep commandline window:
CF VECTOR LOWAnd press enter after it. Failing to do this will result with crushing at address 0x0 after pressing the GO button. The reason for this is, VxWorks is setting the Vector table to LOW, and by default visionPROBE/ICE ia setting it to HIGH.** NOTE: If you are using visionPROBE II/visionICE II to program the Flash, this option should be set to high.
CF VECTOR HIGH
In order to be able to work with the Intel 82557/9 NIC the PCI ARB PLD version should be 4.0 or higher. The PCI ARB PLD is the chip in socket UX1. On the chip you can see a label with the version number.
The diagram below shows the location of jumpers relevant to VxWorks:
_______________________________________________________________________ | +------------+ | | | J4 | | | +------------+ | | +----------------+ +------------+ | | | | | J3 | +---+ | | | Motorola | +------------+ | | | |+-+ | | +------------+ | | | ||J| | XPC 7400 | | J1 | | | | ||P| | | +------------+ | | | ||3| | | +---+ +---+ +---+ | J | | ||9| | | |JP1| |JP5| |UX1| | P | | |+-+ +----------------+ +---+ +---+ +---+ | 3 | | | +------+ +---+ +---+ +---+ | 8 | | | |6 LEDs| |SW1| |SW2| |SW3| | | | | +------+ +-------+ +---+ +---+ +---+ | | | |+----+ | JP6 | +------------+ | | | || RS | +-------+ | J2 | | | | ||232 | +------------+ \ +---+ | |+----+ +--------+ +------------+ JP4 | | | JP36 | | J5 | | | +--------+ +------------+ PPMC- 7400 | |_______________________________________________________________________|Key:
UX1 - Clock Oscillator Socket
J1 - Mictor Connectors
J2 - Mictor Connectors
J3 - Mictor Connectors
J4 - Mictor Connectors
J5 - Mictor Connectors
JP4 - Ground Test Loop
JP6 - 16 Pin JTAG/COP Debug Interface (Motorola Specified)
JP36 - Wind River Mailbox Connector
JP37 - MPC107 Watchpoint Trigger Control
JP38 - Power Module Connector
JP39 - EPLD ISP HeaderSW1/2/3 - Configuration Switches.
SW1-SW3 are three DIP switches that enable the user to configure
the board to match the desired processor._______________________________________________________________________ | ______________________________ | | | | | | | | | | | | | | ) J6 - SODIMM SOCKET ( | | | | | | | | | | | | | | | | | | | | | | ------------------------------ | | +----------------+ +-+ +-+ | | | Motorola | | | P1 | |P2 | | | | | | | | | | | +--+ | | | | | | | | | | | | | +-+ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | +--+ | | | +-+ | | | | | | | | JP40| | | | | XPC 107A | | | | | | | Reverse side of PPMC - 7400 +----------------+ +-+ +-+ | |_______________________________________________________________________|Key:P1 - Standard 64-pin PPMC Connector
P2 - Standard 64-pin PPMC Connector
J6 - SODIMM Socket
JP40 - Auxiliary Power Connector.bS
_______________ _________ | | | | | |_____| | | | | | | | | | | | | +-----+| | | SW1 || | +-----+| | | | | | | | | | | | | | | | | | | | _____ Power | | | | Module | |_______________| |_________| \be
_________ _______________ | | || | | | |J7||_____| | | | | | | +--+ | | +---+ | | | | | | | | | | | | | | | | | | | | | | | | J38 | | | | | | | | | | | | | | | | | | | | | | | | | | +---+ | | | | _____ Reverse side of| | | | Power Module | |_________| |_______________|Key:SW1 6-Way DIP Switch Settings (used to set the processor core VCC settings)
SW1-1 - PWR MOD SW1.1 (VID 4)
SW1-2 - PWR MOD SW1.2 (VID 3)
SW1-3 - PWR MOD SW1.3 (VID 2)
SW1-4 - PWR MOD SW1.4 (VID 1)
SW1-5 - PWR MOD SW1.5 (VID 0)
SW1-6 - PWR MOD SW1.6 (N/C)J7 - Primary Power Input Connector
JP38 - Power Module Connector
_______________________ | | | ____________________________________________________| J2 | J1 |_ | |____________|__________| | | JP8 \ -- JP4 JP7 \ | | | | +----------------+ | | | J22 | | | +----------------+ | | | | +----+ | | |JP10| | | +----+ | | +----------------+ +----------------+ | | | J21 | | J20 | | | +----------------+ +----------------+ | | +---+ +---+ | | | | | | | | | | | | | | | | | | | | | | | | | | |PCI| |PCI| ______ | | | | | | | \ | | | | | | | PCI | _____| | | | | | | ARB | F1 |J24 | | | | | | |_______| +-+ |_____| | | | | | | | | | | | | | -- JP3 | | _____| | | | | | JP6 / | | | | | | | | | | | | JP2 | | | | | | | | | | | | | | | +-+ |_____| | | | | | | | +---+ +---+ +-+ | | J4 J3 | | | | +--+ | | | | | | | |F2 | | | | | | | | |S1| | | | | | | +-+ | | PPMC Carrier Board | | | | +--+ | |______________________________________________________________________________|
Key:S1 - Power ON/Off Switch
F1 - F5A L 250V Feuse
F2 - F10A L 250V Feuse
J1 - cPCI Connector
J2 - cPCI Connector
J3 - 32 bit PCI Connector
J4 - 32 bit PCI Connector
J20 - Standard 64-pin PPMC Connector
J21 - Standard 64-pin PPMC Connector
J22 - Standard 64-pin PPMC Connector
J24 - Primar Power Input Connector +5V 5A
JP2 - Primar Power Input Connector +5V 10A
JP3 - PCI bus arbitration jumper
JP4 - Causes the card to operate as Host
JP6 - Ground Test Loop
JP7 - Ground Test Loop
JP8 - Ground Test Loop
JP10 - Auxiliary Power ConnectorSH "BIBLIOGRAPHY" PPMC 750/755/7400 User's Manual Motorola MPC750 RISC Microprocessor User's Manual, Motorola PowerPC Microprocessor Family: The Programming Environments, Peripheral Component Interconnect (PCI) Local Bus Specification, Rev 2.1, PCI to PCI Bridge Architecture Specification 2.0, PICMG 2.0 D2.14 CompactPCI Specification, IEEE P1386.1 Draft 2.0 - PCI Mezzanine Card Specification (PMC),