VxWorks BSP Reference : ads826x
ads826x - Motorola MPC826XADS
This reference entry provides board-specific information necessary to run VxWorks for the ads8260/8266 BSP.
The BSP will work with the rev PILOT of the ADS8260 board. The default rev is PILOT, which is turned on by the macro BOARD_REV_PILOT in config.h.
The BSP will work with the rev ENG of the ADS8266 board.
No VxWorks Boot ROM is provided with this BSP release. Nevertheless VxWorks boot code is working if downloaded into the SIMM Flash ROM.
VxWorks boot code can be programmed in to Flash using one of the following methods:
Using the Macraigor Raven (www.macraigor.com), and their OCD Commander host-based software a bootrom image can be read from the host and programmed into Flash Rom, as detailed below:On the host, prepare a hex image of the bootrom. On a Unix host:
make bootrom_uncmp.hexInstall the Raven connector through a parallel port onto your host, and power it on. Connect the COP interface cable from the Raven into the ADS board's JTAG/COP connector.Once all the connections have been made, power up the ADS board and start the OCD Commander executable on the host.
1. Execute the reset command to initialize the board:
> RESET2. Click FLASH PGM. Wait for the flash programmer to come up.3. Click Program. Wait for the programming menu.
4. Click Browse and select the bootrom_uncmp.hex file.
5. Select "Erase Target Flash Sectors Before Programming".
6. Change the "Start Programming at Flash Address:" value to 0xfff00000.
7. Click Program. The software will erase the flash, then program it, and finally will say Program/Verify Complete.
Booting VxWorks as detailed below, and then using VxWorks to read the bootrom image from a host and to program it into Flash RomThis is explained below:
1. Boot VxWorks as detailed below
2. Configure and start the Tornado target server on the host.
3. On the host, prepare a hex image of the bootrom. On a Unix host:
make bootrom_uncmp.bin cp bootrom_uncmp.bin /tmp ls -l /tmp/bootrom_uncmp.binNote the number of bytes given by the last step4. Using a VxWorks shell, read and program the image. Replace the number of bytes (359044 below) with the size of your image. Make sure the allocated buffer is large enough:
sysFlashErase 0 fd1 = open ("/tmp/bootrom_uncmp.bin",2,0) p1 = malloc (0x100000) read (fd1, p1, 359044) sysFlashWrite (p1, 359044, 0,0)Note that the offset on the PILOT rev board will have to be (0xfff00000 - FLASH_ADRS). See ROM considerations below.5. At this point the VxWorks bootrom is programmed into Flash rom. Resetting the board should yield the familiar VxWorks boot screen.
1. Setting the board Jumpers & Switches:
In order to get the board running with the default configuration, the
switches need to be set as follows:
2. Creating a bootrom_uncmp.hex:
Dip SW1 Dip SW2 Dip SW3 Dip SW4 SWOPT0 ON SA0 ON Boot Source ON MODCKH0 ON SWOPT1 ON SA1 ON PCI Arbiter ON MODCKH1 OFF SWOPT2 ON SA2 ON PCI DLL OFF MODCKH2 OFF Reserved ON Reserved ON PCI CFG OFF MODCKH3 OFF PCIMODCK ON MODCK1 ON MODCK2 OFF MODCK3 OFF
2.1 Launch Tornado II, go to the "Build" menu and choose the option
"Build Boot ROM...".
2.2 The "Build Boot ROM" window will popup,
in the "Select a BSP:" column choose the "ads826x", and
in the "Select an Image to build:" column, choose
"bootrom_uncmp.hex" and compiler of choice, and press the "OK"
button.
2.3 Once the build process finish successfully (You will see "Done"
in the "Build window" without error), you will find the file
"bootrom_uncmp.hex" in the BSP directory
"$(WIND_BASE)/target/config/ads826x".3. Programming bootrom_uncmp to the MPC8266ADS-PCI FLASH:
If you are using visionCLICK, please follow the instruction in
section 3.1.
If you are using SingleStep, please follow the instruction in section
3.2.3.1 Using visionCLICK:
3.1.1 Connect the JTAG interface cable from the visionPROBE II or
visionICE II into the MPC8266ADS-PCI board JTAG (P3 The
JTAG Port) connector, and power it on.Once all the connections have been made, power up the
MPC8266ADS-PCI board and start visionCLICK on the host.3.1.2 Configure the visionCLICK project:
The "Welcome To visionCLICK" window will appear. In this
window press on the "Configure" button, this will invoke
the "PROJECTS/LOAD" window. In this window press on
the + left of the "PowerPC_C_Demo@0x00800400.prj"
project to expand the project which will show you the
current project configuration.Point with the mouse cursor on the "Microprocessors" option
and right-click to choose "PowerPC->MPC82xx->MPC8265"Verify that the "Target Control" option points to
visionPROBE for visionPROBE II, or visionICE for
visionICE II.Switch to the "Communications" TAB and verify that the
"Normal Port/Rate" & "Download Port/Rate" is set to the
correct LPT port if you are using visionPROBE II or enter
the emulator IP address if you are using visionICESave the project by clicking the "Save" button at the
bottom of the window. Click the "Activate" button to send
the project configuration to the attached hardware
debugger.3.1.3 Program visionPROBE II / visionICE II with the proper
register setting for the MPC8266ADS-PCI board:
Cut-and-paste the register file "MPC8266ADS.reg" at the end
of this document and save it.Go to the "Tools" menu and select the "Log Output/Playback
Scripts" option. The "Record / Playback" dialog box will
popup. Go to the "Playback Commands From File"
group and click the "Browse" button. Navigate to the
location of the register file: "MPC8266ADS.reg". After
choosing the register file press on the "Open" button to
confirm the selected reg file. This will return you back
to the "Record / Playback" dialog box. Click the "Start"
button located in the same group. In the "Terminal" window
you can see that visionCLICK is running the script.
When the script is finished running, you will get
back the ">BKM>" or the ">ERR>" prompt.3.1.4 Get into Background Mode:
At the "Terminal" window, execute the "IN" command to reset
the board and initialize it with the register settings.>ERR>IN
***********************************************************
VisionICE II Initialization Sequence. Copyright WIND RIVER
Corp. 2002
***********************************************************
Support Expires..... 1/12/03 Target Processor..... MPC8265
VisionICE II Group ID#= 0
VisionICE II Serial#= N2201100 Firmware=vn2.0a
Type CF for a Menu of Configuration Options Using
Front PANEL as BDM source
Initializing Background Debug Mode..............Successful
>BKM>If initialize properly, you should see >BKM> prompt at the
terminal window as shown above.Ensure that the register file have been loaded to both
the emulator and the target. Verfiy the values for "OR0",
"BR0", "OR2" and "BR2" shown in the Register window under
"MEMC" group matches the target. To find out a register
value in the target, in "Terminal" windows, type "DR
name_of_register". For e.g.>BKM>DR OR0
The proper values are:
OR0 = FF800836
BR0 = FF801801
OR2 = FF000C80
BR2 = 000000413.1.5 Setting the Flash Chip Select:
3.1.5.1 Once the ">BKM>" prompt appears we need to verify
that the Flash chip select configuration is
correct. To do this, type "CS" at the >BKM>
prompt in the "Terminal" window and press Enter.
The first line ("CS0") is for the Flash chip
select. Under the "PS" (for Port Size) column for
CS0, check that the number is "32".If configured properly, goto Section 3.1.6.
If not configured properly, follow the steps below
to change it:3.1.5.2 Type "CS CS0" in the "Terminal" window and press
Enter.>BKM>CS CS0
3.1.5.3 Press enter until you get the following line:
(0-3) = 64, 8, 16, 32 bits | Port Size=32 Bits >
Enter 3 for "32" bits and keep pressing Enter until
you get to the ">BKM>" prompt again.3.1.5.4 Once the prompt appears, reset the board and the
emulator with the following command:>BKM>IN
After you get the ">BKM>" prompt, continue with the
instructions in the next section.3.1.6 Converting bootrom_uncmp.hex to bootrom_uncmp.bin:
3.1.6.1 In visionCLICK, choose "Convert Object Modules"
from the "Tools" menu. The "CONVERT BINARY AND
SYMBOL OBJs" window will appear. Go to the
"Select Input Object Module To Convert"
group and navigate to the file "bootrom_uncmp.hex"
located in "$(WIND_BASE)/target/config/ads826x3.1.6.2 In the group "Binary Downloadable Objects Modules"
check the "Create Flat BIN File For Flash
Programming". "In Range Of 0x" edit box, enter
"0" for the start address, and in the "To 0x" edit
box, enter "FFFFFFFF".3.1.6.3 Make sure that none of the other check boxes are
checked. Press the "Convert" button. Close the
terminal window when the conversion completes.3.1.7 Programming the MPC8266ADI-PCI Flash:
In visionCLICK, select "Program Flash Devices" from the
Tools pull-down menu and this will invoke the "TF FLASH
PROGRAMMING" window.
3.1.7.1 Click the "Select" in the "Flash Card or PC Host
File Name and Path" group. The "CHOOSE A FILE FROM
HOST PC" window will appear. In the edit box enter
the full path of the file "bootrom_uncmp.bin", or
use the "<--Browse" button to navigate to the file.Go to the "+/- Bias" group and enter "FFF00000" in
the edit box. Click the "OK" button. This will
bring you back to the "TF FLASH PROGRAMMING"
window.3.1.7.2 In the "Programming Algorithm" group, click the
"Select" button, and select the following Flash
devices:"Intel 28F016/16S (2048 x 8) 4 Devices"
3.1.7.3 Set the base address of the Flash to "FFF00000",
check the "Erase All" radio button.Set the start address of "Available RAM Workspace"
to "00000000" with the "Bytes Of Target RAM Required"
set to "60000".3.1.7.4 Press the "Erase and Program" button.
3.1.7.5 Now the Flash memory is programmed with the new
boot program.3.2 Using SingleStep for Vision:
3.2.1 Connect the JTAG interface cable from the visionPROBE II or
visionICE II into the MPC8266ADS-PCI board JTAG (P3 The
JTAG Port) connector, and power it on.Once all the connections have been made, power up the
MPC8266ADS-PCI board and start SingleStep for Vision on the
host.3.2.2 Configure the SingleStep project:
3.2.2.1 Go to the "File" menu and choose the "Start Debug
Session...". The "Debug" dialog box will popup.3.2.2.2 In the "File" tab choose the "Debug without a file"
option.3.2.2.3 In the "Connection" tab choose the visionPROBE
option and the correct LPT port if you are using
visionPROBE, or visionICE & enter the
emulator IP address if you are using visionICE.3.2.2.4 In the "Processor" tab choose the "MPC8265".
3.2.2.5 In the "Register" tab choose the option
"Use vision-style register window with REG file"
and then browse to the location of the file
"MPC8266ADS.reg" and choose it.Check the boxes next to "User-specified" and
"Always playback file".Press OK at the bottom of the "Debug" dialog box
and the "Debug Status" dialog box will popup. In
the "Debug Seesion" field of this box, you should
see a green "Started Successfully", press the
"Close" button.3.2.3 Get into Background Mode:
3.2.3.1 Now go to the "Command" button in the toolbar and
press on it. The "Command" Window will popup, the
prompt in the window will either be "SingleStep>"
or "BKM>".If "BKM>" prompt, then proceed to 3.2.4.
If "SingleStep>" propt, bring the mouse cursor
above the "Command" window and press the right
button. A menu will popup, choose the
"VisionShell(vsh)" option. The prompt in the
window should be ">BKM>". If the prompt is
">ERR>" execute the "IN" command to reset the board
and initialize it with the register setting.ERR>IN
This command is the reset command to initialize the
board. If initialize properly, you should see
>BKM> prompt at the terminal window as shown above.Ensure that the register file have been loaded to
both the emulator and the target. Verfiy the
values for "OR0", "BR0", "OR2" and "BR2" shown in
the Register window under "MEMC" group matches the
target. To find out a register value in the
target, in "Command" windows, type "DR
name_of_register". For e.g.>BKM>DR OR0
The proper values are:
OR0 = FF800836
BR0 = FF801801
OR2 = FF000C80
BR2 = 00000041If the registers' values on the target do not match
with the values shown above, then move the mouse
cursor to the "Command" window and right-click to
choose "Run VisionShell Script...". A "Open
VisionShell Scritp" window will popup, navigate to
the location of the register file:
"MPC8266ADS.reg". After choosing the register file
press on the "Open" button to confirm the selected
reg file. In the "Command" window you can see that
SingleStep for Vision is running the script. When
the script is finished running, you will get
back to the ">BKM>" or the ">ERR>" prompt, execute
the "IN" command to reset the board and initialize
it with the register setting.ERR>IN
At the BKM> prompt, re-verify the register values
for "OR0", "BR0", "OR2" and "BR2".3.2.4 Setting the Flash Chip Select:
3.2.4.1 Once the ">BKM>" prompt appears we need to verify
that the Flash chip select configuration is
correct. To do this, type "CS" at the >BKM> prompt
in the "Terminal" window and press Enter. The first
line ("CS0") is for the Flash chip select. Under
the "PS" (for Port Size) column for CS0, check that
the number is "32".If configured properly, goto Section 3.1.6.
If not configured properly, follow the steps below
to change it:3.2.4.2 Type "CS CS0" in the "Terminal" window and press
Enter.>BKM>CS CS0
3.2.4.3 Press enter until you get the following line:
(0-3) = 64, 8, 16, 32 bits | Port Size=32 Bits >
Enter 3 for "32" bitsa nd keep pressing Enter until
you get the ">BKM>" prompt again.3.2.4.4 Once the prompt appears, reset the board and the
emulator with the following command:>BKM>IN
After you get the ">BKM>" prompt, continue with the
instructions in the next section.3.2.5 Converting the bootrom_uncmp.hex to bootrom_uncmp.bin:
3.2.5.1 Go to the menu and choose "Tools" and
"Vision Flash Utility..." .3.2.5.2 The "Flash Programming Window" will popup. Go to
the "Files" tab, press the "Convert" button.3.2.5.3 The "Select An Executable File to Convertfor Flash
Programming" windows will popup, browse to
$(WIND_BASE)/target/config/ads826x and select
"bootrom_uncmp.hex". Press "Open" button to close
the window.3.2.5.4 The "File Convertion" window will popup. In the
"Enter new start address" edit box type "0x0" and
in the "Enter new end address" edit box type
"0xFFFFFFFF".3.2.5.4 Now press the "Convert" button. After the convert
operation finished, you will see it in the "Convert
Result" section press the "Close" button.3.2.6 Programming the MPC8266ADS-PCI Flash:
3.2.6.2 In the "Flash Programming Window" window. Go to the
"Configuration" tab, & choose the following Flash
device:"Intel 28F016/16S (2048 x 8) 4 Devices"
In "Flash Bank" group for the "Start:" enter
"FFF00000".In the "RAM Workspace" group for the
"Workspace Start at:" enter "00000000" and for the
"Workspace Size:" enter "60000".In the "Erase Range" group, press "Select all".
3.2.6.3 Now switch to the "Files" tab and press the "Add"
button. The open dialogbox will popup, browse to
"$(WIND_BASE)\target\config\ads826x" and choose
the "bootrom_uncmp.bin" file. Now after getting
back to the "Files" tab, you will see the full path
to the selected file in the "Binary Files" group.Move the mouse cursor above the line that showing
the full path in the "Binary Files" group and
press the right button to highlight this line. Now
press the "Toggle Enable" button to select this
binary file. Make sure that the line is still
highlighted, and press the "Edit" button on the
right. The "File Edit" dialog box will popup. In
the "Enter new start address" edit box enter
"0xFFF00000" and press the "OK" button.3.2.6.4 Now go to the "Program" tab and press the
"Erase/Program" button.3.2.6.5 Now the Flash memory is programmed with the new
boot program.4. Running the VxWorks Boot ROM program:
4.1 Disconnect visionPROBE II or the visonICE II if it is still
connected to the board. In some case it can stop the processor
at the first instruction if it is still connected.4.2 Connecting the Ethernet channel and the serial channel:
4.2.1 First, connect the supplied serial cable with the board. On
one side, connect to the SCC1 port on the MPC8266ADS-PCI
board. On the other side connect it to your host serial
port.The UART device is set as follows: 8 data bits, 1 stop bit,
hardware handshaking, and parity disabled. The serial
console baud rate is 9600 bps.4.2.2 Connect a standard Ethernet cable to the the RJ45 connector
to the 100/10 Base-T port on the MPC8266ADS-PCI board.4.3 Launch a terminal program on the host side, and configure it
according to the following details: 8 data bits, 1 stop bit,
hardware handshaking, and parity disabled. The serial console
baud rate is 9600 bps.4.4 To execute the boot program, reset the board by cycling the power
or pressing the reset button. You should see the vxWorks boot
count down on the terminal window. Press any key to stop the
count down. Now follow the instructions in the "Getting Started"
chapter of the "VxWorks Programmer's Guide" for more details on
how to configure vxWorks.
CF TAR 8265 CF GRP 60001 SC IMMR 047101A8 04700062 SIU SC SIUMCR 04710000 0E200000 SIU SC SYPCR 04710004 FFFFFFC3 SIU SC SWSR 0471000E 0000 SIU SC BCR 04710024 100C0000 SIU SC PPC_ACR 04710028 03 SIU SC PPC_ALRH 0471002C 30126745 SIU SC PPC_ALRL 04710030 89ABCDEF SIU SC LCL_ACR 04710034 02 SIU SC LCL_ALRH 04710038 01234567 SIU SC LCL_ALRL 0471003C 89ABCDEF SIU SC TESCR1 04710040 80025000 SIU SC TESCR2 04710044 00000000 SIU SC LTESCR1 04710048 00004000 SIU SC LTESCR2 0471004C 00000000 SIU SC PDTEA 04710050 04700060 SIU SC PDTEM 04710054 08 SIU SC LDTEA 04710058 00000000 SIU SC LDTEM 0471005C 00 SIU SC OR0 04710104 FF800836 MEMC SC BR0 04710100 FF801801 MEMC SC OR1 0471010C FFFF8010 MEMC SC BR1 04710108 04501801 MEMC SC OR2 04710114 FF000C80 MEMC SC BR2 04710110 00000041 MEMC SC OR3 0471011C FF000C80 MEMC SC BR3 04710118 00000000 MEMC SC OR4 04710124 FFC01480 MEMC SC BR4 04710120 00000000 MEMC SC OR5 0471012C FFFF03F6 MEMC SC BR5 04710128 00000000 MEMC SC OR6 04710134 FFF00856 MEMC SC BR6 04710130 00000000 MEMC SC OR7 0471013C FFFF03F6 MEMC SC BR7 04710138 00000000 MEMC SC OR8 04710144 FFFF8010 MEMC SC BR8 04710140 04731801 MEMC SC OR9 0471014C FFFF0000 MEMC SC BR9 04710148 00000000 MEMC SC OR10 04710154 FFFF0000 MEMC SC BR10 04710150 00000000 MEMC SC OR11 0471015C FFFF0000 MEMC SC BR11 04710158 00000000 MEMC SC MAR 04710168 00000200 MEMC SC MAMR 04710170 00000000 MEMC SC MBMR 04710174 00000000 MEMC SC MCMR 04710178 00000000 MEMC SC MPTPR 04710184 4000 MEMC SC MDR 04710188 00000000 MEMC SC PSDMR 04710190 416EB452 MEMC SC LSDMR 04710194 4086A552 MEMC SC PURT 04710198 08 MEMC SC PSRT 0471019C 0E MEMC SC LURT 047101A0 00 MEMC SC LSRT 047101A4 0E MEMC SC PCIBR0 047101AC 80000001 MEMC SC PCIBR1 047101B0 04800001 MEMC SC PCIMSK0 047101C4 C0000000 MEMC SC PCIMSK1 047101C8 FF800000 MEMC SC TMCNTSC 04710220 0000 TIMERS SC TMCNT 04710224 00000000 TIMERS SC TMCNTAL 0471022C 00000000 TIMERS SC PISCR 04710240 0000 TIMERS SC PITC 04710244 00000000 TIMERS SC PITR 04710248 00000000 TIMERS SC SCCR 04710C80 00000019 CLOCKS SC SCMR 04710C88 0A51C002 CLOCKS SC RSR 04710C90 00000003 CLOCKS SC RMR 04710C94 00000000 CLOCKS SC SICR 04710C00 0000 SIC SC SIVEC 04710C04 00000000 SIC SC SIPNR_H 04710C08 FFFD0100 SIC SC SIPNR_L 04710C0C 00000000 SIC SC SIPRR 04710C10 05309770 SIC SC SCPRR_H 04710C14 05309770 SIC SC SCPRR_L 04710C18 05309770 SIC SC SIMR_H 04710C1C 00000000 SIC SC SIMR_L 04710C20 00C00000 SIC SC SIEXR 04710C24 00000000 SIC SC PDIRA 04710D00 00000000 IOPORTS SC PPARA 04710D04 00000000 IOPORTS SC PSORA 04710D08 00000000 IOPORTS SC PODRA 04710D0C 00000000 IOPORTS SC PDATA 04710D10 DFC031F9 IOPORTS SC PDIRB 04710D20 00000000 IOPORTS SC PPARB 04710D24 00000000 IOPORTS SC PSORB 04710D28 00000000 IOPORTS SC PODRB 04710D2C 00000000 IOPORTS SC PDATB 04710D30 0FFFFFFF IOPORTS SC PDIRC 04710D40 00000000 IOPORTS SC PPARC 04710D44 000A0000 IOPORTS SC PSORC 04710D48 00000000 IOPORTS SC PODRC 04710D4C 00000000 IOPORTS SC PDATC 04710D50 FFFD33CE IOPORTS SC PDIRD 04710D60 00000012 IOPORTS SC PPARD 04710D64 0000003F IOPORTS SC PSORD 04710D68 00000002 IOPORTS SC PODRD 04710D6C 00000000 IOPORTS SC PDATD 04710D70 0FFF7FFF IOPORTS SC SDRMR 04710C94 0000 ESTSDRAM SC SDPSRT 0471019C 0E ESTSDRAM SC PSDMR1 04710190 016EB452 ESTSDRAM SC PSDMR2 04710190 016EB452 ESTSDRAM SC PSDMR3 04710190 296EB452 ESTSDRAM SC MEM1 00000000 FF ESTSDRAM SC PSDMR4 04710190 296EB452 ESTSDRAM SC PSDMR5 04710190 096EB452 ESTSDRAM SC MEM2 00000000 FF ESTSDRAM SC MEM3 00000001 FF ESTSDRAM SC MEM4 00000002 FF ESTSDRAM SC MEM5 00000003 FF ESTSDRAM SC MEM6 00000004 FF ESTSDRAM SC MEM7 00000005 FF ESTSDRAM SC MEM8 00000006 FF ESTSDRAM SC MEM9 00000007 FF ESTSDRAM SC PSDMR6 04710190 096EB452 ESTSDRAM SC PSDMR7 04710190 196EB452 ESTSDRAM SC MEM10 00000000 FF ESTSDRAM SC PSDMR8 04710190 596EB452 ESTSDRAM SC PSDMR9 04710190 418F48BA ESTSDRAM SC SDLSRT 047101A4 0E ESTLSDRAM SC LSDMR1 04710194 2886A552 ESTLSDRAM SC MEM11 04000000 FF ESTLSDRAM SC LSDMR2 04710194 0886A552 ESTLSDRAM SC MEM12 04000000 FF ESTLSDRAM SC MEM13 04000001 FF ESTLSDRAM SC MEM14 04000002 FF ESTLSDRAM SC MEM15 04000003 FF ESTLSDRAM SC MEM16 04000004 FF ESTLSDRAM SC MEM17 04000005 FF ESTLSDRAM SC MEM18 04000006 FF ESTLSDRAM SC MEM19 04000007 FF ESTLSDRAM SC LSDMR3 04710194 1886A552 ESTLSDRAM SC MEM20 04000000 FF ESTLSDRAM SC LSDMR4 04710194 4086A552 ESTLSDRAM MM 0x4c00 0x0000
The baud rate generator assumes a 40 MHz or 66 MHz system clock and a CPM multiplication factor of 2. Although the PILOT board supports reading the Hard Reset Configuration Word from Flash or from the BCSR, the currently shipping Pilot Board has a processor XPC8260 rev. 0.2, which does not support reading the Flash at Power-on or Hard reset and so must be set to use BCSR. This setting and the CPM multiplication factor is programmed on DS1, as follows:
If the system clock is 33 MHz then the DIP switch MODCKH 1 (position 3) should be set to Off.
Label Position FLASH/BCSR Off MODCKH 0 On MODCKH 1 Off MODCKH 2 On MODCKH 3 Off MODCK 1 Off MODCK 2 Off MODCK 3 Off On revision PILOT of the ADS8260 board, there is a new JTAG machine inserted in front of the MPC8260's COP/JTAG port to provide fast download capability for the ADS. Via J5 it is possible to bypass the new JTAG machine to be compatible with the ENG rev of the board. In the tested configuration, a jumper is placed between positions 1-2 of J5 to enable the new JTAG machine.
SCC1 and SCC2 as a UART
FCC2 as an Ethernet device supporting 10BaseT and 100BaseT protocol
Interrupt Controller
System Clock
Baud Rate Generators as required for SCC1 and SCC2
16 MByte SDRAM DIMM on 60x bus (32 and 64 MByte configurations have not been tested)
DMA as required only for SCC1, SCC2, and FCC2
Auxiliary clock and timestamp clock
8 MByte Flash module (16 and 32 MByte configurations have not been tested)
Flash read and write capability
Instruction and Data caches
On-chip PCI bridge for 82xx chips. See Known Problems. (HIP4)
PCI Bridge Direct DMA (HIP4)
PCI Error Handling (HIP4)
virtual DMA
Parallel Ports
Baud Rate Generators not used by supported devices
4MByte SDRAM on local bus.
Reset capability or options
SCC1 and SCC2 in any mode other than UART
SCC3 and SCC4
ATM, Transparent, or HDLC protocols on FCC2
FCC1 and FCC3
MCC1 and MCC2
SMC1 or SMC2
Any of the eight TDM interfaces
Support for the L2 cache (hardware not available yet)
Support for the two 96 DIN connectors (Voyager Tools Board connector and Expansion connector) which bring out all pins on the MPC8260 chip
None known
This section documents the details of the device drivers and board hardware elements.
The chip drivers included are:m8260Flash.c - flash memory driver
m8260Sio.c - serial driver
m8260IntrCtl.c - interrupt controller driver
m8260Timer.c - timer driver
motFccEnd.c - FCC Ethernet END driver
miiLib.c - Media Independent Interface library
mot82xxPci.c - On-chip PCI Bridge library/interrupt handler.The BSP configures both SCC1 and SCC2 as UART devices. SCC1 is used as a console device. FCC2 is used as an ethernet port.
The following table describes the ads8260 default memory map:
Start Size End Access to 0x0000_0000 16MB 0x00FF_FFFF SDRAM DIMM on 60X bus 0x0100_0000 48MB 0x03FF_FFFF Unused (partially used when optional 32MB DIMM is installed, and fully used when optional 64MB DIMM is installed in place of standard 16MB DIMM) 0x0400_0000 4MB 0x043F_FFFF Soldered SDRAM on local (1) bus (unsupported) 0x0440_0000 1MB 0x044F_FFFF Unused 0x0450_0000 32KB 0x0450_7FFF Board Control and Status Registers (BCSR0 through BCSR7 on PILOT revision) 0x0450_8000 0x045F_FFFF Unused 0x0460_0000 32KB 0x0460_7FFF ATM (unsupported) 0x0460_8000 0x046F_FFFF Unused 0x0470_0000 64KB 0x0471_FFFF MPC 8260 Internal Memory (see MPC8260 PowerQUICC II User's Manual, Chapter 3, Memory Map, and Chapter 13, CPM Overview, for further details, and see Parameter Ram below) 0x0472_0000 0xFCFF_FFFF Unused 0xFD00_0000 32MB 0xFFFF_FFFF Flash SIMM (size optional) The following table describes the ads8260 default usage of the MPC8260's internal Parameter Ram, sometimes also called Data/Parameter Ram or DPRAM:
Start Size End Description 0x0470_0000 8 bytes 0x0470_0007 SCC1 Receive Buffer Descriptor 0x0470_0000 2 bytes 0x0470_0001 SCC1 Receive Buffer Status 0x0470_0002 2 bytes 0x0470_0003 SCC1 Receive Buffer Length 0x0470_0004 4 bytes 0x0470_0007 pointer to SCC1 Receive Buffer 0x0470_0008 8 bytes 0x0470_000F SCC1 Transmit Buffer Descriptor 0x0470_0008 2 bytes 0x0470_0009 SCC1 Transmit Buffer Status 0x0470_000A 2 bytes 0x0470_000B SCC1 Transmit Buffer Length 0x0470_000C 4 bytes 0x0470_000F pointer to SCC1 Transmit Buffer 0x0470_0040 1 bytes 0x0470_0040 SCC1 Receive Buffer 0x0470_0060 1 bytes 0x0470_0060 SCC1 Transmit Buffer 0x0470_0100 8 bytes 0x0470_0107 SCC2 Receive Buffer Descriptor 0x0470_0100 2 bytes 0x0470_0101 SCC2 Receive Buffer Status 0x0470_0102 2 bytes 0x0470_0103 SCC2 Receive Buffer Length 0x0470_0104 4 bytes 0x0470_0107 pointer to SCC2 Receive Buffer 0x0470_0108 8 bytes 0x0470_010F SCC2 Transmit Buffer Descriptor 0x0470_0108 2 bytes 0x0470_0109 SCC2 Transmit Buffer Status 0x0470_010A 2 bytes 0x0470_010B SCC2 Transmit Buffer Length 0x0470_010C 4 bytes 0x0470_010F pointer to SCC2 Transmit Buffer 0x0470_0140 1 bytes 0x0470_0140 SCC2 Receive Buffer 0x0470_0160 1 bytes 0x0470_0160 SCC2 Transmit Buffer 0x0470_2000 16 byte 0x0470_2000 IDMA2 buffer descriptor 0x0470_3800 44 byte 0x0470_3800 IDMA2 parameters 0x0470_b000 4 bytes 0x0470_b000 IDMA2 receive buffer The following table describes the default VxWorks macros which are used to address memory
Macro Name Macro Definition Description LOCAL_MEM_LOCAL_ADRS 0x0000_0000 Base of RAM RAM_LOW_ADRS LOCAL_MEM_LOCAL_ADRS + 0x0001_0000 VxWorks image loaded here. Stack grows down from this address. RAM_HIGH_ADRS LOCAL_MEM_LOCAL_ADRS + 0x00d0_0000 VxWorks bootrom loaded here. LOCAL_MEM_SIZE 0100_0000 Default 16 MBytes of RAM BCSR_BASE_ADRS 0450_0000 Default location of Board Control and Status Registers on PILOT rev BCSRS_SIZE 0001_0000 64 KBytes on PILOT rev DEFAULT_IMM_ADRS 0470_0000 Default location of MPC 8260 Internal Memory Map IMM_SIZE 0x20000 128K Internal Memory Map Size ROM_BASE_ADRS 0xFFF0_0000 Base address of ROM on PILOT rev ROM_TEXT_ADRS ROM_BASE_ADRS + 0x100 Text must start after vector table ROM_WARM_ADRS ROM_TEXT_ADRS + 8 Warm Reboot Entry Address ROM_SIZE 0x0010_0000 Default 1 MByte of ROM on PILOT rev (see ROM considerations)
The support include PCI DMA and PCI Error Handling. The standard mapping for PCI is described in config.h of this BSP and uses outbound translation to access. This means PCI space usage is configurable by the user in config.h. INCLUDE_PCI_DMA intialises the interrupt and handlers for PCI Bridge DMA INCLUDE_PCI_ERROR_HANDLING intialises the interrupt and handlers for PCI Bridge Error handling interrupts and a show routine (pciErrorShow) detailing which errors have occured and how many. Defining PCI_BRIDGE_READ_ERRATA_WORKAROUND uses IDMA for read access to PCI which is a workaround for the HW errata. Extra cycles are used up on read accesses because of this.
The following table describes the relationship between the interrupt number, interrupt vector, and the interrupt bit position in the SIU Interrupt Mask Register (SIMR_H and SIMR_L). Also described is the mask to use to enable all interrupts of a higher priority. See m8260IntrCtl.c for usage.
Default Mask to Enable Interrupt Interrupt Interrupt SIMR Higher Priority Interrupts Interrupt Priority Number Vector Mask SIMR_H SIMR_L Source HIGHEST PRIORITY 1 16 0x10 H 0x00000004 0000_0000 0000_0000 TMCNT 2 16 0x10 H 0x00000004 0000_0000 0000_0000 TMCNT 3 17 0x11 H 0x00000002 0000_0004 0000_0000 PIT 4 18 0x12 H 0x00000001 0000_0006 0000_0000 PCI 5 19 0x13 H 0x00004000 0000_0006 0000_0000 IRQ1 6 27 0x20 L 0x80000000 0000_4006 0000_0000 FCC1 7 28 0x21 L 0x40000000 0000_4006 8000_0000 FCC2 8 29 0x22 L 0x20000000 0000_4006 C000_0000 FCC3 9 inactive 10 unused 11 31 0x24 L 0x08000000 0000_4006 E000_0000 MCC1 12 32 0x25 L 0x04000000 0000_4006 E800_0000 MCC2 13 inactive 14 inactive 15 20 0x13 H 0x00002000 0000_4006 EC00_0000 IRQ2 16 21 0x14 H 0x00001000 0000_6006 EC00_0000 IRQ3 17 22 0x15 H 0x00000800 0000_7006 EC00_0000 IRQ4 18 23 0x16 H 0x00000400 0000_7806 EC00_0000 IRQ5 19 unused 20 35 0x28 L 0x00800000 0000_7C06 EC00_0000 SCC1 21 36 0x29 L 0x00400000 0000_7C06 EC80_0000 SCC2 22 37 0x2A L 0x00200000 0000_7C06 ECC0_0000 SCC3 23 38 0x2B L 0x00100000 0000_7C06 ECE0_0000 SCC4 24 inactive 25 inactive 26 inactive 27 inactive 28 unused 29 40 0x30 H 0x00010000 0000_7C06 ECF0_0000 PC15 30 12 0x0C L 0x00000010 0001_7C06 ECF0_0000 Timer 1 31 41 0x31 H 0x00020000 0001_7C06 ECF0_0010 PC14 32 unused 33 42 0x32 H 0x00040000 0003_7C06 ECF0_0010 PC13 34 10 0x0A L 0x00000040 0007_7C06 ECF0_0010 SDMA Bus Error 35 6 0x06 L 0x00000400 0007_7C06 ECF0_0050 IDMA1 36 unused 37 43 0x33 H 0x00080000 0007_7C06 ECF0_0450 PC12 38 44 0x34 H 0x00100000 000F_7C06 ECF0_0450 PC11 39 7 0x07 L 0x00000200 001F_7C06 ECF0_0450 IDMA2 40 13 0x0D L 0x00000008 001F_7C06 ECF0_0650 Timer 2 41 45 0x35 H 0x00200000 001F_7C06 ECF0_0658 PC10 42 unused 43 unused 44 3 0x03 L 0x00002000 003F_7C06 ECF0_0658 RISC Timer Table 45 1 0x01 L 0x00008000 003F_7C06 ECF0_2658 I2C 46 unused 47 46 0x36 H 0x00400000 003F_7C06 ECF0_A658 PC9 48 47 0x37 H 0x00800000 007F_7C06 ECF0_A658 PC8 49 24 0x18 H 0x00000200 00FF_7C06 ECF0_A658 IRQ6 50 8 0x08 L 0x00000100 00FF_7E06 ECF0_A658 IDMA3 51 25 0x19 H 0x00000100 00FF_7E06 ECF0_A758 IRQ7 52 14 0x0E L 0x00000004 00FF_7F06 ECF0_A758 Timer 3 53 unused 54 unused 55 48 0x38 H 0x01000000 00FF_7F06 ECF0_A75C PC7 56 49 0x39 H 0x02000000 01FF_7F06 ECF0_A75C PC6 57 50 0x3A H 0x04000000 03FF_7F06 ECF0_A75C PC5 58 15 0x0F L 0x00000002 07FF_7F06 ECF0_A75C Timer 4 59 unused 60 51 0x3B H 0x08000000 07FF_7F06 ECF0_A75E PC4 61 unused 62 9 0x09 L 0x00000080 0FFF_7F06 ECF0_A75E IDMA4 63 2 0x02 L 0x00004000 0FFF_7F06 ECF0_A7DE SPI 64 52 0x3C H 0x10000000 0FFF_7F06 ECF0_E7DE PC3 65 53 0x3D H 0x20000000 1FFF_7F06 ECF0_E7DE PC2 66 4 0x04 L 0x00001000 3FFF_7F06 ECF0_E7DE SMC1 67 unused 68 5 0x05 L 0x00000800 3FFF_7F06 ECF0_F7DE SMC2 69 54 0x3E H 0x40000000 3FFF_7F06 ECF0_FFDE PC1 70 55 0x3F H 0x80000000 7FFF_7F06 ECF0_FFDE PC0 71 unused 72 unused 73 reserved LOWEST PRIORITY
SCC1 and SCC2 are configured as UART devices with 8 data bits, 1 stop bit, hardware handshaking, and parity disabled.
There is no SCSI interface on this board.
FCC2 is configured as an Ethernet port
PCI interface is available on HIP4 parts apart from MPC8260.
motFcc
EthernetLoad image via Macraigor Raven and invoke via "OCD Commander"
The actual size of Flash memory on this board is 8MB (optionally 16MB or 32MB) starting at (0xffffffff - FLASH_SIZE).The system exception vector table is placed at 0xfff00000, so boot-up code has to be programmed at this location.
The BSP was tested with both compressed and uncompressed boot roms programmed at this location. If there is not enough space for the bootrom image or a vxWorks standalone image is required to be in ROM, this can be achieved by placing a stub that jumps to start of flash memory. This requires either a compiler which can provide 2 text segments or manually programming the stub and the main image at different locations without overwriting each other.
This section describes miscellaneous information that the user needs to know about the BSP.
Bootrom_uncmp, vxWorks and vxWorks.st are delivered. All other make targets are untested. For PILOT revision of board, bootrom (compressed) is also tested.
None
Most VxWorks BSPs do not use hardware handshaking in the serial interface, and thus a simple 3 wire connection is commonly used. The MPC8260 ADS BSP does use hardware handshaking and this requires a full 8 pin interface. Standard molded RS-232 cables have been shown to work, possibly requiring a null modem adapter.See also "Known Problems" below.
The MPC8260 ADS boards do not have a unique Ethernet hardware address assigned to each board. A unique address is absolutely necessary if the user wishes to connect the board to a network. Thus, the user must provide a suitable 6 byte Ethernet address for each board used on a network. The address is programmed by changing the sysFccEnetAddr character array in the file sysLib.c. The first three bytes (0x08, 0x00, 0x3e) are a Motorola-specific prefix that should be kept as-is. The user must change the last three bytes from 0x03, 0x02, 0x01 to three unique bytes (i.e., bytes not used by any other Motorola Ethernet connection on your net). Check with your system administrator if you do not know this information.
Note that in the Motorola MPC8260 PowerQUICC II ADS User's Manual the size of the MPC8260's Internal MAP is incorrectly stated. it is stated correctly in the Motorola MPC8260 PowerQUICC II User's Manual as 128K bytes.
Serial driver transmitter hangs if receiver is hit too rapidly; however receiver continues to function. ADS8266-PCI board has a problem on old revs where a bias resistor has an incorrect value. This manifests itself as the processor hanging on a pci read. Recovery only occurs on hard reset. There is errata fixed in this BSP for read access to PCI, it uses IDMA2 to access these registers.
The VxWorks bootrom completely initializes the board. On the other hand, VxWorks does not reinitialize many registers. Thus, when the VxWorks image is loaded via the Macraigor Raven and vbug, most values are initialized by the debugger and not by VxWorks. For a list of initialized values, refer to the "VBUG PowerQUICC II Debugger"
.bp
The MPC8260 chip, the MPC8260 ADS, and the host-based software as purchased might differ from the ones used to develop this bsp. Thus, we document the configuration that was used to develop the BSP:
Board Markings:
MPC8260 ADS REV. PILOT (for PILOT revision of board)CPU Chip Markings:
PPC8260ZU 2J24M CREAA9927 HKG (for PILOT rev)SYSCLK oscillator:
40 MHzDIP Switches for PILOT rev:
PON. RST. CONF. (DS1):
Label Position FLASH/BCSR Off MODCKH 0 On MODCKH 1 Off MODCKH 2 On MODCKH 3 Off MODCK 1 Off MODCK 2 Off MODCK 3 Off
SDRAM CONF. ADD. (DS2) for PILOT rev:
Label Position SA2 Off SA1 Off SA0 Off RESERVED Off
According to the latest manual, bit 0 of PSDMR is "PBI", Page Based Interleave. This is true for silicon rev A, which is not yet available. For the silicon that is currently available, this bit is reserved and should be 0, as the sample initialization code indicates.Silicon before Rev A supports only Bank Based Interleave. Page Based Interleave will be available only on silicon rev A and beyond.
Most Motorola sample code and documentation refers to a default system clock frequency of 66 MHz; However, problems occur at this frequency, and thus the ADS is normally delivered with a 40 MHz oscillator.
The diagram below shows jumpers and connectors relevant to VxWorks configuration for PILOT revisions of the board.
___________________________________________________________________________ | RS-232 1 (upper) P5 | | RS-232 2 (lower) COP-JTAG | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P2 - Ethernet | | P19 | | Power | | ------------- ________| | P4 - CPM expansion | | P16 - SYS expansion | |____________________________| |_______________________|Key:
X vertical jumper installed
: vertical jumper absent
- horizontal jumper installed
" horizontal jumper absent
0 switch off
1 switch on
U three-pin vertical jumper, upper jumper installed
D three-pin vertical jumper, lower jumper installed
L three-pin horizontal jumper, left jumper installed
R three-pin horizontal jumper, right jumper installed
Tornado User's Guide: Getting Started, VxWorks Programmer's Guide: Configuration, VxWorks Programmer's Guide: Architecture Appendix
.IB "MPC8266ADS-PCI User's Manual" MPC826x PowerQUICC II Errata MPC8260 ADS User's Manual MPC8260ADS User's Manual, for PILOT revision bd, 11/1999 PowerQUICC II User's Manual, rev. 0 MPC8260 PowerQUICC II User's Manual Errata, rev. 0 MPC8260 Design Checklist PowerPC Microprocessor Family: The Programming Environments for 32-bit Microprocessors MPCFPE32B/AD MPC603e & EC603e RISC Microprocessors User's Manual MPC603EUM/AD VBUG PowerQUICC II Debugger
Much of the Motorola documentation can be found on line. The following URL was correct at the time of writing; however, Motorola may move these pages without notifying Wind River Systems.
http://www.mot.com/SPS/RISC/netcomm/prod/eppc/MPC8260.html
Contains the following:
MPC8260 Product Briefs
MPC8260 User's Manuals
MPC8260 Hardware Specifications
MPC8260 Errata
MPC8260 Third Party Support
MPC8260 Training MaterialsContains the following:
MPC8260ADS User's Manual, for PILOT revision bd, 11/1999
http://www.mot.com/SPS/RISC/netcomm/docs/pubs/index.html
Contains the following:
MPC8260 PowerQUICC II User's Manual, rev. 0
MPC8260 PowerQUICC II User's Manual Errata, rev. 0
MPC8260 Design Checklist